sci-electronics/verilator: bump to 4.040

Fix bison 3.7 build bug
Applied https://github.com/verilator/verilator/pull/2505

Package-Manager: Portage-3.0.3, Repoman-3.0.0
Signed-off-by: Huang Rui <vowstar@gmail.com>
This commit is contained in:
Huang Rui
2020-08-23 15:00:06 +08:00
parent 206f845b83
commit 957ee646c3
3 changed files with 68 additions and 1 deletions

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@@ -1,3 +1,4 @@
DIST verilator-4.034.tar.gz 2612571 BLAKE2B ff4fd49f3ef09fb17c7cce799b2c39f89ce327245b11d2f6ab9a6644e04654d637be4689e4b8d8841e37c889f7d614a41b9e475a276de8adf80587cf14fc9d3b SHA512 04c9c0f51c5c8262cd8e8338204ed6729a3f5be399e012252dd2c102f6474a9abcfdb693bc13eb4fcf7e74e0a6dfa375c3b6592fbc5b5ad2ed07f852a4a06646
DIST verilator-4.034.tar.gz 1998271 BLAKE2B 456ee4c8e7d28dd979f74cd8c6b5e734d33267b5dba1926f82b6827fbc1b2625aafc4f4d088c961be1632957966ab350767f836ed7eee1f1f01b4315f1c8f2b2 SHA512 5651cf2c102df10b3784799968f8e554d0116487a962b99fd03526b71af67cb49c932eaaef260b19cbfc80a47747dd6e8d04b461f663522cd1f05ad9843002d3
DIST verilator-4.036.tar.gz 2064470 BLAKE2B 210d39747e132ce1de8673e971c8765a28eeb23f30902dd032acb67a6d5f9fce2eae8c4edec00b839c6e81ff0985a99e4b065b4a570531f393d47802121eea93 SHA512 2f83bf144346aed4ff6bd208af56ed19cbe562c51324b8dc3243419b63734ff15c805fd6e7d5c2109af9cf51f7d44e249d7f1cc1a383bab428503de317e1d60c
DIST verilator-4.038.tar.gz 2085353 BLAKE2B 330162ed8786b6ac1127e844224ad4a3cfc20e6bc2bbf8f1662ae23e3b18b8b908b145390a2e284ff2b70299b9475d25da7eb23643c70b617d95061c7a4a79c3 SHA512 a963aeccd4bb36a3ac39a5e831ec2600b87c0b46c787fa38900b7bd0ae59fb75dbfaf6261d1050ae1bd29fdb8b0b6a1957f08559c36c498f49738819b4d56d68
DIST verilator-4.040.tar.gz 2094439 BLAKE2B 52303784d0385884280b254bc9a259880184e852a1102d0ad0b1d81490c63a6900789cefc1b3138cdbaec9f35c1593d464355cf58be12a7abb33d9d3c3161648 SHA512 5084b367bddca62df3fe4de1ef8c0c04d02bbf104b433d6caedfd9334659fda323dc4ce650138a3b16e0d9d87fb89453d8fc3fd4f9be298359baf03d986d8e01

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@@ -0,0 +1,19 @@
diff --git a/src/verilog.y b/src/verilog.y
index 2f16ef23..1175542c 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -301,6 +301,15 @@ class AstSenTree;
// Bison 3.0 and newer
BISONPRE_VERSION(3.0,%define parse.error verbose)
+// We run bison with the -d argument. This tells it to generate a
+// header file with token names. Old versions of bison pasted the
+// contents of that file into the generated source as well; newer
+// versions just include it.
+//
+// Since we run bison through ../bisonpre, it doesn't know the correct
+// header file name, so we need to tell it.
+BISONPRE_VERSION(3.7,%define api.header.include {"V3ParseBison.h"})
+
// When writing Bison patterns we use yTOKEN instead of "token",
// so Bison will error out on unknown "token"s.

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@@ -0,0 +1,47 @@
# Copyright 1999-2020 Gentoo Authors
# Distributed under the terms of the GNU General Public License v2
EAPI="7"
inherit autotools
DESCRIPTION="The fast free Verilog/SystemVerilog simulator"
HOMEPAGE="
https://verilator.org
https://github.com/verilator/verilator
"
if [[ "${PV}" == "9999" ]] ; then
inherit git-r3
EGIT_REPO_URI="https://github.com/${PN}/${PN}.git"
else
SRC_URI="https://github.com/${PN}/${PN}/archive/v${PV}.tar.gz -> ${P}.tar.gz"
KEYWORDS="~alpha ~amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ~ppc ~ppc64 ~riscv ~s390 ~sparc ~x86"
fi
LICENSE="|| ( Artistic-2 LGPL-3 )"
SLOT="0"
RDEPEND="
dev-lang/perl
sys-libs/zlib
"
DEPEND="
${RDEPEND}
"
BDEPEND="
sys-devel/bison
sys-devel/flex
"
PATCHES=(
# https://github.com/verilator/verilator/pull/2505
"${FILESDIR}"/${PN}-4.040-fix-bison.patch
)
src_prepare() {
default
eautoconf --force
}