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sci-electronics/circt: enable py3.13
Signed-off-by: Huang Rui <vowstar@gmail.com>
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@@ -6,7 +6,7 @@ EAPI="8"
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MY_PV="${PV//./\/}"
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MY_LLVM_PV="d978730d8e2c10c76867b83bec2f1143d895ee7d"
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CMAKE_BUILD_TYPE="Release"
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PYTHON_COMPAT=( python3_{11..12} )
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PYTHON_COMPAT=( python3_{11..13} )
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inherit cmake python-r1
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DESCRIPTION="The fast free Verilog/SystemVerilog simulator"
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@@ -6,7 +6,7 @@ EAPI="8"
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MY_PV="${PV//./\/}"
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MY_LLVM_PV="6595e7fa1b5588f860aa057aac47c43623169584"
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CMAKE_BUILD_TYPE="Release"
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PYTHON_COMPAT=( python3_{11..12} )
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PYTHON_COMPAT=( python3_{11..13} )
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inherit cmake python-r1
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DESCRIPTION="The fast free Verilog/SystemVerilog simulator"
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