sci-electronics/circt: enable py3.13

Signed-off-by: Huang Rui <vowstar@gmail.com>
This commit is contained in:
Huang Rui
2025-05-05 11:15:41 +08:00
parent c3b17c8af9
commit 0dc6241a2a
2 changed files with 2 additions and 2 deletions

View File

@@ -6,7 +6,7 @@ EAPI="8"
MY_PV="${PV//./\/}"
MY_LLVM_PV="d978730d8e2c10c76867b83bec2f1143d895ee7d"
CMAKE_BUILD_TYPE="Release"
PYTHON_COMPAT=( python3_{11..12} )
PYTHON_COMPAT=( python3_{11..13} )
inherit cmake python-r1
DESCRIPTION="The fast free Verilog/SystemVerilog simulator"

View File

@@ -6,7 +6,7 @@ EAPI="8"
MY_PV="${PV//./\/}"
MY_LLVM_PV="6595e7fa1b5588f860aa057aac47c43623169584"
CMAKE_BUILD_TYPE="Release"
PYTHON_COMPAT=( python3_{11..12} )
PYTHON_COMPAT=( python3_{11..13} )
inherit cmake python-r1
DESCRIPTION="The fast free Verilog/SystemVerilog simulator"