mirror of
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13 lines
537 B
Plaintext
13 lines
537 B
Plaintext
BDEPEND=dev-vcs/git
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DEFINED_PHASES=configure prepare
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DEPEND=dev-libs/boost media-gfx/xdot sys-devel/clang
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DESCRIPTION=framework for Verilog RTL synthesis
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EAPI=8
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HOMEPAGE=http://www.clifford.at/yosys/
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KEYWORDS=~amd64
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LICENSE=ISC
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RDEPEND=dev-libs/boost media-gfx/xdot sys-devel/clang
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SLOT=0
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SRC_URI=https://github.com/YosysHQ/yosys/archive/yosys-0.40.tar.gz https://github.com/YosysHQ/abc/archive/0cd90d0d2c5338277d832a1d890bed286486bcf5.tar.gz -> abc-0cd90d0d2c5338277d832a1d890bed286486bcf5.tar.gz
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_md5_=d26f8a90a1fc2acbbc8b82743637f043
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