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126 lines
6.9 KiB
Diff
126 lines
6.9 KiB
Diff
diff --git a/components/esp_eth/include/esp_eth_mac_esp.h b/components/esp_eth/include/esp_eth_mac_esp.h
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index 8c4909b8c5..39db373798 100644
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--- a/components/esp_eth/include/esp_eth_mac_esp.h
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+++ b/components/esp_eth/include/esp_eth_mac_esp.h
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@@ -217,64 +217,64 @@ typedef enum {
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#error "Unsupported RMII clock mode"
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#endif // CONFIG_ETH_RMII_CLK_INPUT
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-#define ETH_ESP32_EMAC_DEFAULT_CONFIG() \
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- { \
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- .smi_gpio = \
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- { \
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- .mdc_num = 23, \
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- .mdio_num = 18 \
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- }, \
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- .interface = EMAC_DATA_INTERFACE_RMII, \
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- .clock_config = \
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- { \
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- .rmii = \
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- { \
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- .clock_mode = DEFAULT_RMII_CLK_MODE, \
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- .clock_gpio = DEFAULT_RMII_CLK_GPIO \
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- } \
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- }, \
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- .dma_burst_len = ETH_DMA_BURST_LEN_32, \
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- .intr_priority = 0, \
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+#define ETH_ESP32_EMAC_DEFAULT_CONFIG() \
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+ { \
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+ .smi_gpio = \
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+ { \
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+ .mdc_num = 23, \
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+ .mdio_num = 18 \
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+ }, \
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+ .interface = EMAC_DATA_INTERFACE_RMII, \
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+ .clock_config = \
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+ { \
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+ .rmii = \
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+ { \
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+ .clock_mode = DEFAULT_RMII_CLK_MODE, \
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+ .clock_gpio = (emac_rmii_clock_gpio_t) DEFAULT_RMII_CLK_GPIO \
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+ } \
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+ }, \
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+ .dma_burst_len = ETH_DMA_BURST_LEN_32, \
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+ .intr_priority = 0, \
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}
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#elif CONFIG_IDF_TARGET_ESP32P4
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-#define ETH_ESP32_EMAC_DEFAULT_CONFIG() \
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- { \
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- .smi_gpio = \
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- { \
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- .mdc_num = 31, \
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- .mdio_num = 27 \
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- }, \
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- .interface = EMAC_DATA_INTERFACE_RMII, \
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- .clock_config = \
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- { \
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- .rmii = \
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- { \
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- .clock_mode = EMAC_CLK_EXT_IN, \
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- .clock_gpio = 50 \
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- } \
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- }, \
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- .clock_config_out_in = \
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- { \
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- .rmii = \
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- { \
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- .clock_mode = EMAC_CLK_EXT_IN, \
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- .clock_gpio = -1 \
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- } \
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- }, \
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- .dma_burst_len = ETH_DMA_BURST_LEN_32, \
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- .intr_priority = 0, \
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- .emac_dataif_gpio = \
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- { \
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- .rmii = \
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- { \
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- .tx_en_num = 49, \
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- .txd0_num = 34, \
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- .txd1_num = 35, \
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- .crs_dv_num = 28, \
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- .rxd0_num = 29, \
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- .rxd1_num = 30 \
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- } \
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- }, \
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+#define ETH_ESP32_EMAC_DEFAULT_CONFIG() \
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+ { \
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+ .smi_gpio = \
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+ { \
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+ .mdc_num = 31, \
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+ .mdio_num = 27 \
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+ }, \
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+ .interface = EMAC_DATA_INTERFACE_RMII, \
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+ .clock_config = \
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+ { \
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+ .rmii = \
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+ { \
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+ .clock_mode = EMAC_CLK_EXT_IN, \
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+ .clock_gpio = (emac_rmii_clock_gpio_t) 50 \
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+ } \
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+ }, \
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+ .clock_config_out_in = \
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+ { \
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+ .rmii = \
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+ { \
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+ .clock_mode = EMAC_CLK_EXT_IN, \
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+ .clock_gpio = (emac_rmii_clock_gpio_t) -1 \
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+ } \
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+ }, \
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+ .dma_burst_len = ETH_DMA_BURST_LEN_32, \
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+ .intr_priority = 0, \
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+ .emac_dataif_gpio = \
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+ { \
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+ .rmii = \
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+ { \
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+ .tx_en_num = 49, \
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+ .txd0_num = 34, \
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+ .txd1_num = 35, \
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+ .crs_dv_num = 28, \
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+ .rxd0_num = 29, \
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+ .rxd1_num = 30 \
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+ } \
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+ }, \
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}
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#endif // CONFIG_IDF_TARGET_ESP32P4
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