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15 lines
930 B
Plaintext
15 lines
930 B
Plaintext
BDEPEND=sys-devel/bison sys-devel/flex sys-devel/gnuconfig >=app-portage/elt-patches-20170815 || ( >=sys-devel/automake-1.16.4:1.16 ) >=sys-devel/autoconf-2.71 >=sys-devel/libtool-2.4
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DEFINED_PHASES=prepare
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DEPEND=dev-lang/perl sys-libs/zlib
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DESCRIPTION=The fast free Verilog/SystemVerilog simulator
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EAPI=8
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HOMEPAGE=https://verilator.org https://github.com/verilator/verilator
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INHERIT=autotools
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KEYWORDS=~alpha ~amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ~ppc ~ppc64 ~riscv ~s390 ~sparc ~x86
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LICENSE=|| ( Artistic-2 LGPL-3 )
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RDEPEND=dev-lang/perl sys-libs/zlib
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SLOT=0
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SRC_URI=https://github.com/verilator/verilator/archive/v4.218.tar.gz -> verilator-4.218.tar.gz
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_eclasses_=gnuconfig 262062cef0ba4f22b397193da514a350 toolchain-funcs badd6e329e1f3e6bee99b35bf8763ce8 multilib 4a33c9008e5ee30cb8840a3fdc24df2b libtool 241a8f577b9781a42a7421e53448a44e autotools ed3ef2014ee93d24bde80f0c0ea9732e
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_md5_=0fdb3bcdfcdd5d1d8b7d4780dee28459
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