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guru/sci-electronics/cocotb/cocotb-2.0.1-r1.ebuild
Huang Rui fb34e5df3a sci-electronics/cocotb: add 2.0.1-r1 for py3.14, drop 2.0.1
- Lift upstream setup.py max_python3_minor_version 13 to 14 via patch.
- Verified: pip wheel build, C extensions, core imports OK on 3.14.5.

Closes: https://bugs.gentoo.org/975540
Signed-off-by: Huang Rui <vowstar@gmail.com>
2026-05-20 19:20:18 +08:00

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# Copyright 1999-2026 Gentoo Authors
# Distributed under the terms of the GNU General Public License v2
EAPI=8
PYTHON_COMPAT=( python3_{12..14} )
DISTUTILS_USE_PEP517=setuptools
DISTUTILS_EXT=1
inherit distutils-r1 pypi
DESCRIPTION="Python-based chip (RTL) verification"
HOMEPAGE="https://www.cocotb.org"
LICENSE="BSD"
SLOT="0"
KEYWORDS="~amd64 ~arm64 ~riscv ~x86"
# Tests requires many eda tools, and can't work inside network sandbox
RESTRICT=test
PATCHES=(
"${FILESDIR}"/${P}-python-3.14.patch
)
RDEPEND="
dev-python/find-libpython[${PYTHON_USEDEP}]
"
DEPEND="${RDEPEND}"
src_compile() {
# parallel build is broken
MAKEOPTS="-j1" distutils-r1_src_compile
}
python_test() {
epytest
}
pkg_postinst() {
elog "cocotb requires a HDL simulator to function correctly."
elog "You may want to install one of the following packages:"
elog " sci-electronics/icarus-verilog - Verilog simulator"
elog " sci-electronics/ghdl - VHDL simulator"
elog " sci-electronics/verilator - Fast Verilog simulator"
elog ""
elog "Commercial EDA tools are also supported, including:"
elog " - Synopsys VCS"
elog " - Cadence Xcelium/Incisive"
elog " - Siemens EDA Modelsim/Questa"
elog " - Aldec Riviera-PRO"
elog "Note: These commercial tools need to be obtained from their respective vendors"
}