Files
guru/metadata/md5-cache/sci-electronics/circt-1.76.0
Repository mirror & CI 25bb388881 2024-09-08 18:37:23 UTC
2024-09-08 18:37:23 +00:00

18 lines
1.8 KiB
Plaintext

BDEPEND=virtual/pkgconfig app-alternatives/ninja >=dev-build/cmake-3.20.5
DEFINED_PHASES=compile configure install prepare test
DEPEND=python_targets_python3_11? ( dev-lang/python:3.11 ) python_targets_python3_12? ( dev-lang/python:3.12 ) test? ( dev-python/psutil[python_targets_python3_11(-)?,python_targets_python3_12(-)?] sci-electronics/verilator ) sys-libs/ncurses:0=
DESCRIPTION=The fast free Verilog/SystemVerilog simulator
EAPI=8
HOMEPAGE=https://circt.llvm.org https://github.com/llvm/circt
INHERIT=cmake python-r1
IUSE=test python_targets_python3_11 python_targets_python3_12
KEYWORDS=~amd64 ~arm64 ~riscv ~x86
LICENSE=Apache-2.0-with-LLVM-exceptions UoI-NCSA BSD public-domain rc
RDEPEND=python_targets_python3_11? ( dev-lang/python:3.11 ) python_targets_python3_12? ( dev-lang/python:3.12 ) test? ( dev-python/psutil[python_targets_python3_11(-)?,python_targets_python3_12(-)?] sci-electronics/verilator ) sys-libs/ncurses:0=
REQUIRED_USE=|| ( python_targets_python3_11 python_targets_python3_12 )
RESTRICT=!test? ( test )
SLOT=0
SRC_URI=https://github.com/llvm/circt/archive/refs/tags/firtool-1.76.0.tar.gz -> circt-1.76.0.tar.gz https://github.com/llvm/llvm-project/archive/6595e7fa1b5588f860aa057aac47c43623169584.tar.gz -> llvm-project-6595e7fa1b5588f860aa057aac47c43623169584.tar.gz
_eclasses_=toolchain-funcs 948855ec7ad9f11351edf9066708dfa9 multilib 7e1347c006a76bb812f3a9f663b79991 flag-o-matic fa33e3696fe4689dda7e9affe92e2c94 multiprocessing e644caa6eb7ce7e5ab0864383ac13ad9 ninja-utils 2df4e452cea39a9ec8fb543ce059f8d6 xdg-utils 5465aed08f1dfc2a75f14cbea4272961 cmake 10a50dfaf728b802fcfd37f8d0da9056 out-of-source-utils a0eb740debe3d472355e8bc52f62e0ac multibuild 45df57b1877333d70a9e894f6c8fdb3a python-utils-r1 6881b056477c23167d9a6b33e146374e python-r1 c1fc393cd1e72f093b4838e29d27918c
_md5_=65ae3d33723f276c82a1ad2e09396276