BDEPEND=sys-devel/bison sys-devel/flex sys-devel/gnuconfig >=app-portage/elt-patches-20170815 || ( >=sys-devel/automake-1.16.2-r1:1.16 ) >=sys-devel/autoconf-2.69 >=sys-devel/libtool-2.4
DEFINED_PHASES=prepare
DEPEND=dev-lang/perl sys-libs/zlib
DESCRIPTION=The fast free Verilog/SystemVerilog simulator
EAPI=7
HOMEPAGE=https://verilator.org https://github.com/verilator/verilator
INHERIT=autotools
KEYWORDS=~alpha ~amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ~ppc ~ppc64 ~riscv ~s390 ~sparc ~x86
LICENSE=|| ( Artistic-2 LGPL-3 )
RDEPEND=dev-lang/perl sys-libs/zlib
SLOT=0
SRC_URI=https://github.com/verilator/verilator/archive/v4.200.tar.gz -> verilator-4.200.tar.gz
_eclasses_=gnuconfig	9f91b4b0c84e734a87492d4293f03de5	toolchain-funcs	24921b57d6561d87cbef4916a296ada4	multilib	d410501a125f99ffb560b0c523cd3d1e	libtool	f143db5a74ccd9ca28c1234deffede96	autotools	9e63f92c2a5d867fea55ecb160c7d354
_md5_=8f89c786bc023d64a2925ea68853db65