diff --git a/sci-electronics/verilator/metadata.xml b/sci-electronics/verilator/metadata.xml
index 626ddc8c86..7756cca212 100644
--- a/sci-electronics/verilator/metadata.xml
+++ b/sci-electronics/verilator/metadata.xml
@@ -5,6 +5,9 @@
 		<email>vowstar@gmail.com</email>
 		<name>Huang Rui</name>
 	</maintainer>
+	<upstream>
+		<remote-id type="github">verilator/verilator</remote-id>
+	</upstream>
 	<longdescription>
 	Verilator, the fastest free Verilog HDL simulator.
 	Accepts synthesizable Verilog or SystemVerilog