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2020-09-19 14:35:19 UTC

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2020-09-19 14:35:19 +00:00
parent 1c1f34a103
commit dbf8b74a2e
21 changed files with 59 additions and 132 deletions
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13
metadata/md5-cache/sci-electronics/verilator-4.034
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@@ -1,13 +0,0 @@
BDEPEND=sys-devel/bison sys-devel/flex >=app-portage/elt-patches-20170815 || ( >=sys-devel/automake-1.16.1:1.16 >=sys-devel/automake-1.15.1:1.15 ) >=sys-devel/autoconf-2.69 >=sys-devel/libtool-2.4
DEFINED_PHASES=prepare
DEPEND=dev-lang/perl sys-libs/zlib
DESCRIPTION=The fast free Verilog/SystemVerilog simulator
EAPI=7
HOMEPAGE=https://verilator.org https://github.com/verilator/verilator
KEYWORDS=~alpha ~amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ~ppc ~ppc64 ~riscv ~s390 ~sparc ~x86
LICENSE=|| ( Artistic-2 LGPL-3 )
RDEPEND=dev-lang/perl sys-libs/zlib
SLOT=0
SRC_URI=https://github.com/verilator/verilator/archive/v4.034.tar.gz -> verilator-4.034.tar.gz
_eclasses_=autotools 7d999b62b8749fad43fff00620cedf47 libtool f143db5a74ccd9ca28c1234deffede96 multilib 98584e405e2b0264d37e8f728327fed1 toolchain-funcs 605c126bed8d87e4378d5ff1645330cb
_md5_=96adec06ae2b5b381f4938bf6440d6dc

13
metadata/md5-cache/sci-electronics/verilator-4.036
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@@ -1,13 +0,0 @@
BDEPEND=sys-devel/bison sys-devel/flex >=app-portage/elt-patches-20170815 || ( >=sys-devel/automake-1.16.1:1.16 >=sys-devel/automake-1.15.1:1.15 ) >=sys-devel/autoconf-2.69 >=sys-devel/libtool-2.4
DEFINED_PHASES=prepare
DEPEND=dev-lang/perl sys-libs/zlib
DESCRIPTION=The fast free Verilog/SystemVerilog simulator
EAPI=7
HOMEPAGE=https://verilator.org https://github.com/verilator/verilator
KEYWORDS=~alpha ~amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ~ppc ~ppc64 ~riscv ~s390 ~sparc ~x86
LICENSE=|| ( Artistic-2 LGPL-3 )
RDEPEND=dev-lang/perl sys-libs/zlib
SLOT=0
SRC_URI=https://github.com/verilator/verilator/archive/v4.036.tar.gz -> verilator-4.036.tar.gz
_eclasses_=autotools 7d999b62b8749fad43fff00620cedf47 libtool f143db5a74ccd9ca28c1234deffede96 multilib 98584e405e2b0264d37e8f728327fed1 toolchain-funcs 605c126bed8d87e4378d5ff1645330cb
_md5_=5bcd448977234d6db933dfceb3190e90

13
metadata/md5-cache/sci-electronics/verilator-4.038
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@@ -1,13 +0,0 @@
BDEPEND=sys-devel/bison sys-devel/flex >=app-portage/elt-patches-20170815 || ( >=sys-devel/automake-1.16.1:1.16 >=sys-devel/automake-1.15.1:1.15 ) >=sys-devel/autoconf-2.69 >=sys-devel/libtool-2.4
DEFINED_PHASES=prepare
DEPEND=dev-lang/perl sys-libs/zlib
DESCRIPTION=The fast free Verilog/SystemVerilog simulator
EAPI=7
HOMEPAGE=https://verilator.org https://github.com/verilator/verilator
KEYWORDS=~alpha ~amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ~ppc ~ppc64 ~riscv ~s390 ~sparc ~x86
LICENSE=|| ( Artistic-2 LGPL-3 )
RDEPEND=dev-lang/perl sys-libs/zlib
SLOT=0
SRC_URI=https://github.com/verilator/verilator/archive/v4.038.tar.gz -> verilator-4.038.tar.gz
_eclasses_=autotools 7d999b62b8749fad43fff00620cedf47 libtool f143db5a74ccd9ca28c1234deffede96 multilib 98584e405e2b0264d37e8f728327fed1 toolchain-funcs 605c126bed8d87e4378d5ff1645330cb
_md5_=5bcd448977234d6db933dfceb3190e90

13
metadata/md5-cache/sci-electronics/verilator-4.040
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@@ -1,13 +0,0 @@
BDEPEND=sys-devel/bison sys-devel/flex >=app-portage/elt-patches-20170815 || ( >=sys-devel/automake-1.16.1:1.16 >=sys-devel/automake-1.15.1:1.15 ) >=sys-devel/autoconf-2.69 >=sys-devel/libtool-2.4
DEFINED_PHASES=prepare
DEPEND=dev-lang/perl sys-libs/zlib
DESCRIPTION=The fast free Verilog/SystemVerilog simulator
EAPI=7
HOMEPAGE=https://verilator.org https://github.com/verilator/verilator
KEYWORDS=~alpha ~amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ~ppc ~ppc64 ~riscv ~s390 ~sparc ~x86
LICENSE=|| ( Artistic-2 LGPL-3 )
RDEPEND=dev-lang/perl sys-libs/zlib
SLOT=0
SRC_URI=https://github.com/verilator/verilator/archive/v4.040.tar.gz -> verilator-4.040.tar.gz
_eclasses_=autotools 7d999b62b8749fad43fff00620cedf47 libtool f143db5a74ccd9ca28c1234deffede96 multilib 98584e405e2b0264d37e8f728327fed1 toolchain-funcs 605c126bed8d87e4378d5ff1645330cb
_md5_=5bcd448977234d6db933dfceb3190e90

4
metadata/md5-cache/sci-electronics/verilator-4.032 → metadata/md5-cache/sci-electronics/verilator-4.100
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@@ -8,6 +8,6 @@ KEYWORDS=~alpha ~amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ~ppc ~ppc64 ~riscv ~s
LICENSE=|| ( Artistic-2 LGPL-3 )
RDEPEND=dev-lang/perl sys-libs/zlib
SLOT=0
SRC_URI=https://github.com/verilator/verilator/archive/v4.032.tar.gz -> verilator-4.032.tar.gz
SRC_URI=https://github.com/verilator/verilator/archive/v4.100.tar.gz -> verilator-4.100.tar.gz
_eclasses_=autotools 7d999b62b8749fad43fff00620cedf47 libtool f143db5a74ccd9ca28c1234deffede96 multilib 98584e405e2b0264d37e8f728327fed1 toolchain-funcs 605c126bed8d87e4378d5ff1645330cb
_md5_=96adec06ae2b5b381f4938bf6440d6dc
_md5_=7c52df605cf857c0dd5c13e199ce4705