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sci-electronics/verilator: longdescription lang="en"

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Package-Manager: Portage-2.3.99, Repoman-2.3.22
Signed-off-by: Alessandro Barbieri <lssndrbarbieri@gmail.com>
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Alessandro Barbieri
2020-04-27 00:32:19 +02:00
parent 3375e7b7dc
commit d80430cfa3
1 changed files with 1 additions and 1 deletions
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sci-electronics/verilator/metadata.xml
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@@ -8,7 +8,7 @@
<upstream>
<remote-id type="github">verilator/verilator</remote-id>
</upstream>
<longdescription>
<longdescription lang="en">
Verilator, the fastest free Verilog HDL simulator.
Accepts synthesizable Verilog or SystemVerilog
Performs lint code-quality checks