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2025-09-22 09:18:53 UTC

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2025-09-22 09:18:53 +00:00
parent 2af362ac90
commit d62212f00a
59 changed files with 304 additions and 379 deletions
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12
metadata/md5-cache/sci-electronics/yosys-0.40-r1
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BDEPEND=dev-vcs/git
DEFINED_PHASES=configure prepare
DEPEND=dev-libs/boost media-gfx/xdot llvm-core/clang
DESCRIPTION=framework for Verilog RTL synthesis
EAPI=8
HOMEPAGE=http://www.clifford.at/yosys/
KEYWORDS=~amd64
LICENSE=ISC
RDEPEND=dev-libs/boost media-gfx/xdot llvm-core/clang
SLOT=0
SRC_URI=https://github.com/YosysHQ/yosys/archive/yosys-0.40.tar.gz https://github.com/YosysHQ/abc/archive/0cd90d0d2c5338277d832a1d890bed286486bcf5.tar.gz -> abc-0cd90d0d2c5338277d832a1d890bed286486bcf5.tar.gz
_md5_=1e442aa7ea692ce9bfd5acdde4887a3f

12
metadata/md5-cache/sci-electronics/yosys-0.57 Normal file
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@@ -0,0 +1,12 @@
BDEPEND=dev-vcs/git
DEFINED_PHASES=configure
DEPEND=dev-libs/boost media-gfx/xdot llvm-core/clang
DESCRIPTION=framework for Verilog RTL synthesis
EAPI=8
HOMEPAGE=http://www.clifford.at/yosys/
KEYWORDS=~amd64
LICENSE=ISC
RDEPEND=dev-libs/boost media-gfx/xdot llvm-core/clang
SLOT=0
SRC_URI=https://github.com/YosysHQ/yosys/releases/download/v0.57/yosys.tar.gz -> yosys-0.57.tar.gz
_md5_=ebfebfdd588625e3bee0a52926b656dd