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sci-electronics/circt: new package, add 1.14.0

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Signed-off-by: Huang Rui <vowstar@gmail.com>
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Huang Rui
2022-08-28 03:20:07 +08:00
parent 39f09e88c4
commit bfcb1aadad
3 changed files with 136 additions and 0 deletions
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sci-electronics/circt/metadata.xml Normal file
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<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE pkgmetadata SYSTEM "https://www.gentoo.org/dtd/metadata.dtd">
<pkgmetadata>
<maintainer type="person">
<email>vowstar@gmail.com</email>
<name>Huang Rui</name>
</maintainer>
<upstream>
<remote-id type="github">verilator/verilator</remote-id>
</upstream>
<longdescription lang="en">
Verilator, the fastest free Verilog HDL simulator.
Accepts synthesizable Verilog or SystemVerilog
Performs lint code-quality checks
Compiles into multithreaded C++, SystemC, or (soon) C++-under-Python
Creates XML to front-end your own tools
</longdescription>
</pkgmetadata>