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2024-06-12 22:03:50 UTC

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2024-06-12 22:03:50 +00:00
parent 17f2ab12ef
commit 9f604c0c33
19 changed files with 171 additions and 44 deletions
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10
metadata/md5-cache/sci-electronics/circt-1.14.0
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BDEPEND=virtual/pkgconfig app-alternatives/ninja >=dev-build/cmake-3.20.5
DEFINED_PHASES=compile configure install prepare test
DEPEND=python_targets_python3_10? ( dev-lang/python:3.10 ) python_targets_python3_11? ( dev-lang/python:3.11 ) test? ( dev-python/psutil[python_targets_python3_10(-)?,python_targets_python3_11(-)?] sci-electronics/verilator ) sys-libs/ncurses:0=
DEPEND=python_targets_python3_11? ( dev-lang/python:3.11 ) python_targets_python3_12? ( dev-lang/python:3.12 ) test? ( dev-python/psutil[python_targets_python3_11(-)?,python_targets_python3_12(-)?] sci-electronics/verilator ) sys-libs/ncurses:0=
DESCRIPTION=The fast free Verilog/SystemVerilog simulator
EAPI=8
HOMEPAGE=https://circt.llvm.org https://github.com/llvm/circt
INHERIT=cmake python-r1
IUSE=test python_targets_python3_10 python_targets_python3_11
IUSE=test python_targets_python3_11 python_targets_python3_12
KEYWORDS=~amd64 ~arm64 ~riscv ~x86
LICENSE=Apache-2.0-with-LLVM-exceptions UoI-NCSA BSD public-domain rc
RDEPEND=python_targets_python3_10? ( dev-lang/python:3.10 ) python_targets_python3_11? ( dev-lang/python:3.11 ) test? ( dev-python/psutil[python_targets_python3_10(-)?,python_targets_python3_11(-)?] sci-electronics/verilator ) sys-libs/ncurses:0=
REQUIRED_USE=|| ( python_targets_python3_10 python_targets_python3_11 )
RDEPEND=python_targets_python3_11? ( dev-lang/python:3.11 ) python_targets_python3_12? ( dev-lang/python:3.12 ) test? ( dev-python/psutil[python_targets_python3_11(-)?,python_targets_python3_12(-)?] sci-electronics/verilator ) sys-libs/ncurses:0=
REQUIRED_USE=|| ( python_targets_python3_11 python_targets_python3_12 )
RESTRICT=!test? ( test )
SLOT=0
SRC_URI=https://github.com/llvm/circt/archive/refs/tags/sifive/1/14/0.tar.gz -> circt-1.14.0.tar.gz https://github.com/llvm/llvm-project/archive/fe0f72d5c55a9b95c5564089e946e8f08112e995.tar.gz -> llvm-project-fe0f72d5c55a9b95c5564089e946e8f08112e995.tar.gz
_eclasses_=toolchain-funcs e56c7649b804f051623c8bc1a1c44084 multilib c19072c3cd7ac5cb21de013f7e9832e0 flag-o-matic d309b9713dfc18e754cba88d3ba69653 multiprocessing 30ead54fa2e2b5f9cd4e612ffc34d0fe ninja-utils 2df4e452cea39a9ec8fb543ce059f8d6 xdg-utils baea6080dd821f5562d715887954c9d3 cmake c7c9a62d6232cac66d4ea32d575c3e7c out-of-source-utils 1a9007554652a6e627edbccb3c25a439 multibuild d67e78a235f541871c7dfe4cf7931489 python-utils-r1 8b220bbce5c119fb1d4d5c2f5588f3ea python-r1 8a28fa6d3e3bc96ff8a7eff2badbe71f
_md5_=834456c7dd1c140b048ba5ad2954d58e
_md5_=03a8a123dba4383e1af301a8414087de

10
metadata/md5-cache/sci-electronics/circt-1.37.0
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@@ -1,17 +1,17 @@
BDEPEND=virtual/pkgconfig app-alternatives/ninja >=dev-build/cmake-3.20.5
DEFINED_PHASES=compile configure install prepare test
DEPEND=python_targets_python3_10? ( dev-lang/python:3.10 ) python_targets_python3_11? ( dev-lang/python:3.11 ) test? ( dev-python/psutil[python_targets_python3_10(-)?,python_targets_python3_11(-)?] sci-electronics/verilator ) sys-libs/ncurses:0=
DEPEND=python_targets_python3_11? ( dev-lang/python:3.11 ) python_targets_python3_12? ( dev-lang/python:3.12 ) test? ( dev-python/psutil[python_targets_python3_11(-)?,python_targets_python3_12(-)?] sci-electronics/verilator ) sys-libs/ncurses:0=
DESCRIPTION=The fast free Verilog/SystemVerilog simulator
EAPI=8
HOMEPAGE=https://circt.llvm.org https://github.com/llvm/circt
INHERIT=cmake python-r1
IUSE=test python_targets_python3_10 python_targets_python3_11
IUSE=test python_targets_python3_11 python_targets_python3_12
KEYWORDS=~amd64 ~arm64 ~riscv ~x86
LICENSE=Apache-2.0-with-LLVM-exceptions UoI-NCSA BSD public-domain rc
RDEPEND=python_targets_python3_10? ( dev-lang/python:3.10 ) python_targets_python3_11? ( dev-lang/python:3.11 ) test? ( dev-python/psutil[python_targets_python3_10(-)?,python_targets_python3_11(-)?] sci-electronics/verilator ) sys-libs/ncurses:0=
REQUIRED_USE=|| ( python_targets_python3_10 python_targets_python3_11 )
RDEPEND=python_targets_python3_11? ( dev-lang/python:3.11 ) python_targets_python3_12? ( dev-lang/python:3.12 ) test? ( dev-python/psutil[python_targets_python3_11(-)?,python_targets_python3_12(-)?] sci-electronics/verilator ) sys-libs/ncurses:0=
REQUIRED_USE=|| ( python_targets_python3_11 python_targets_python3_12 )
RESTRICT=!test? ( test )
SLOT=0
SRC_URI=https://github.com/llvm/circt/archive/refs/tags/firtool-1.37.0.tar.gz -> circt-1.37.0.tar.gz https://github.com/llvm/llvm-project/archive/d978730d8e2c10c76867b83bec2f1143d895ee7d.tar.gz -> llvm-project-d978730d8e2c10c76867b83bec2f1143d895ee7d.tar.gz
_eclasses_=toolchain-funcs e56c7649b804f051623c8bc1a1c44084 multilib c19072c3cd7ac5cb21de013f7e9832e0 flag-o-matic d309b9713dfc18e754cba88d3ba69653 multiprocessing 30ead54fa2e2b5f9cd4e612ffc34d0fe ninja-utils 2df4e452cea39a9ec8fb543ce059f8d6 xdg-utils baea6080dd821f5562d715887954c9d3 cmake c7c9a62d6232cac66d4ea32d575c3e7c out-of-source-utils 1a9007554652a6e627edbccb3c25a439 multibuild d67e78a235f541871c7dfe4cf7931489 python-utils-r1 8b220bbce5c119fb1d4d5c2f5588f3ea python-r1 8a28fa6d3e3bc96ff8a7eff2badbe71f
_md5_=57f99aa6b4a9406d02b9de1f47a7c1f1
_md5_=9dded52566a13df55546cc048d454f3c

17
metadata/md5-cache/sci-electronics/circt-1.76.0 Normal file
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@@ -0,0 +1,17 @@
BDEPEND=virtual/pkgconfig app-alternatives/ninja >=dev-build/cmake-3.20.5
DEFINED_PHASES=compile configure install prepare test
DEPEND=python_targets_python3_11? ( dev-lang/python:3.11 ) python_targets_python3_12? ( dev-lang/python:3.12 ) test? ( dev-python/psutil[python_targets_python3_11(-)?,python_targets_python3_12(-)?] sci-electronics/verilator ) sys-libs/ncurses:0=
DESCRIPTION=The fast free Verilog/SystemVerilog simulator
EAPI=8
HOMEPAGE=https://circt.llvm.org https://github.com/llvm/circt
INHERIT=cmake python-r1
IUSE=test python_targets_python3_11 python_targets_python3_12
KEYWORDS=~amd64 ~arm64 ~riscv ~x86
LICENSE=Apache-2.0-with-LLVM-exceptions UoI-NCSA BSD public-domain rc
RDEPEND=python_targets_python3_11? ( dev-lang/python:3.11 ) python_targets_python3_12? ( dev-lang/python:3.12 ) test? ( dev-python/psutil[python_targets_python3_11(-)?,python_targets_python3_12(-)?] sci-electronics/verilator ) sys-libs/ncurses:0=
REQUIRED_USE=|| ( python_targets_python3_11 python_targets_python3_12 )
RESTRICT=!test? ( test )
SLOT=0
SRC_URI=https://github.com/llvm/circt/archive/refs/tags/firtool-1.76.0.tar.gz -> circt-1.76.0.tar.gz https://github.com/llvm/llvm-project/archive/6595e7fa1b5588f860aa057aac47c43623169584.tar.gz -> llvm-project-6595e7fa1b5588f860aa057aac47c43623169584.tar.gz
_eclasses_=toolchain-funcs e56c7649b804f051623c8bc1a1c44084 multilib c19072c3cd7ac5cb21de013f7e9832e0 flag-o-matic d309b9713dfc18e754cba88d3ba69653 multiprocessing 30ead54fa2e2b5f9cd4e612ffc34d0fe ninja-utils 2df4e452cea39a9ec8fb543ce059f8d6 xdg-utils baea6080dd821f5562d715887954c9d3 cmake c7c9a62d6232cac66d4ea32d575c3e7c out-of-source-utils 1a9007554652a6e627edbccb3c25a439 multibuild d67e78a235f541871c7dfe4cf7931489 python-utils-r1 8b220bbce5c119fb1d4d5c2f5588f3ea python-r1 8a28fa6d3e3bc96ff8a7eff2badbe71f
_md5_=65ae3d33723f276c82a1ad2e09396276