diff --git a/dev-util/istyle/Manifest b/dev-util/istyle/Manifest
new file mode 100644
index 0000000000..d2d28cfbf2
--- /dev/null
+++ b/dev-util/istyle/Manifest
@@ -0,0 +1 @@
+DIST istyle-1.23_pre20220127.tar.gz 40088 BLAKE2B 0e27a87671f590624cad78b56d1b630be5a950b8213a59622dc0932625a071de7877388c05c9b3d678b0c7b08fbfe149a0de9fd5d619f7af0208ff8ea3c63a3b SHA512 bce3eacfda280212e45aaeb097da8b7889d9ff48b0dd7913c0e14f4bba11f1caa0d1c9a496ac9f616237450c4e07f7249dbd7b47acd6321bd0b404c673593c62
diff --git a/dev-util/istyle/istyle-1.23_pre20220127.ebuild b/dev-util/istyle/istyle-1.23_pre20220127.ebuild
new file mode 100644
index 0000000000..8a7fdde813
--- /dev/null
+++ b/dev-util/istyle/istyle-1.23_pre20220127.ebuild
@@ -0,0 +1,37 @@
+# Copyright 1999-2025 Gentoo Authors
+# Distributed under the terms of the GNU General Public License v2
+
+EAPI=8
+
+MY_COMMIT="e368dee27811d0c891677fa40609e197c64de58c"
+
+inherit cmake
+
+DESCRIPTION="Fast and Free Automatic Formatter for Verilog Source Code"
+HOMEPAGE="https://github.com/thomasrussellmurphy/istyle-verilog-formatter"
+
+if [[ ${PV} == "9999" ]]; then
+	inherit git-r3
+	EGIT_REPO_URI="https://github.com/thomasrussellmurphy/${PN}-verilog-formatter.git"
+else
+	SRC_URI="https://github.com/thomasrussellmurphy/${PN}-verilog-formatter/archive/${MY_COMMIT}.tar.gz -> ${P}.tar.gz"
+	KEYWORDS="~amd64 ~arm64 ~x86"
+	S="${WORKDIR}/${PN}-verilog-formatter-${MY_COMMIT}"
+fi
+
+LICENSE="GPL-2"
+SLOT="0"
+
+src_configure() {
+	local mycmakeargs=(
+		-DCMAKE_INSTALL_PREFIX="${EPREFIX}/usr"
+	)
+	cmake_src_configure
+}
+
+DOCS=( README.md )
+
+src_install() {
+	dobin "${BUILD_DIR}/bin/istyle"
+	einstalldocs
+}
diff --git a/dev-util/istyle/metadata.xml b/dev-util/istyle/metadata.xml
new file mode 100644
index 0000000000..a0799555e2
--- /dev/null
+++ b/dev-util/istyle/metadata.xml
@@ -0,0 +1,24 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!DOCTYPE pkgmetadata SYSTEM "https://www.gentoo.org/dtd/metadata.dtd">
+<pkgmetadata>
+	<maintainer type="person">
+		<email>vowstar@gmail.com</email>
+		<name>Huang Rui</name>
+	</maintainer>
+	<upstream>
+		<remote-id type="github">thomasrussellmurphy/istyle-verilog-formatter</remote-id>
+	</upstream>
+	<longdescription lang="en">
+		iStyle is a fast and free automatic formatter for Verilog source code.
+		It was originally created by haimag and is inspired by Astyle. iStyle
+		helps to standardize code formatting in Verilog projects by automatically
+		adjusting indentation, spacing, and bracket placement according to
+		configurable style options.
+	</longdescription>
+	<longdescription lang="zh">
+		iStyle 是一个快速且免费的 Verilog 源代码自动格式化工具。它最初是由
+		haimag 创建的，并受到 Astyle 的启发。iStyle 通过自动调整缩进、空格和括号
+		位置来帮助标准化 Verilog 项目的代码格式，这些调整是根据可配置的样式选项
+		进行的。
+	</longdescription>
+</pkgmetadata>