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metadata/md5-cache/sci-electronics/verible-0.0.2135 Normal file
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BDEPEND=app-arch/unzip sys-devel/bison sys-devel/flex sys-devel/m4 >=dev-util/bazel-0.20
DEFINED_PHASES=compile install prepare test unpack
DEPEND=sys-libs/zlib
DESCRIPTION=SystemVerilog parser, style-linter, and formatter
EAPI=8
HOMEPAGE=https://chipsalliance.github.io/verible/ https://github.com/chipsalliance/verible
INHERIT=bazel
IUSE=test
KEYWORDS=~amd64
LICENSE=Apache-2.0
RDEPEND=sys-libs/zlib
RESTRICT=!test? ( test )
SLOT=0
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_md5_=b69757cc53016ef008c13aa9e2589258