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sci-electronics/verilator: drop 5.004, 5.006

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Signed-off-by: Huang Rui <vowstar@gmail.com>
This commit is contained in:
Huang Rui
2023-03-31 13:17:54 +08:00
parent 3522336352
commit 41cfe1d3ac
3 changed files with 0 additions and 86 deletions
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2
sci-electronics/verilator/Manifest
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@@ -1,4 +1,2 @@
DIST verilator-4.106.tar.gz 2191982 BLAKE2B 9dbd0dad390b4a009a062a8405dc01a317fed68a2f0becd4bf088c566f2457a4cda04a4c276cf31cdbaa0efa6e64f5618b9439221f8cf4bb469f20f1de1af397 SHA512 b1840b294b22c0d4cf17a0a154e73a631c62b30055f324dca98839ab85e2a524f9e3b6e981b192b941c1dd9837f326ae38cc3fcf686c3f8731d376dc89dd46fe
DIST verilator-5.004.tar.gz 2815642 BLAKE2B 5ae0317335e66faa71285a0027db4208a70b18e253405becff3db91ac591bb2590c827ab49bf4d0a794bd7fa631e3a025879b3919f47b9a2797c4db7cf6f9cef SHA512 4672b36aa00ea563b297be93344dcaaf533f23a2d4e82e61ed5b8e0f19f2f363bcf004aa6088a259b112a87dcfbf7cb10e85b68bb4370f3574cd2e01c921d29d
DIST verilator-5.006.tar.gz 2866281 BLAKE2B 9a66b308e40f0bceb4f07906dbb65e4113494826bcad81d88047402f85fb38f6d2d0bcd2e36f9b32a6144505f13349723909020f3df7a4061397740841885c9f SHA512 a0b5d535ba89f17983a959002dc54b4c24d4c6442576113f2e3305cb0960d2564192f27639ccca33ee7026656b91ca0aa44f0c3efd4ffd75b3d19a8c4530418c
DIST verilator-5.008.tar.gz 2899738 BLAKE2B ef487dd90827f6e8f2110991546a5edcb7919be4d50e32ba6100f3d93a4d00b5351ff1b87d49d08a876b4574b6088b92786120851e2aaa027b2ef5e1a7094c79 SHA512 321fae0b5720cd23e0758762531d6e52b218915621a959eafac8d05f3e9107d122f44c7c38d7b9bb17d26d7f61d032488ae07fb3999c81980cca6ac89bcbc67a

42
sci-electronics/verilator/verilator-5.004.ebuild
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@@ -1,42 +0,0 @@
# Copyright 1999-2022 Gentoo Authors
# Distributed under the terms of the GNU General Public License v2
EAPI="8"
inherit autotools
DESCRIPTION="The fast free Verilog/SystemVerilog simulator"
HOMEPAGE="
https://verilator.org
https://github.com/verilator/verilator
"
if [[ "${PV}" == "9999" ]] ; then
inherit git-r3
EGIT_REPO_URI="https://github.com/${PN}/${PN}.git"
else
SRC_URI="https://github.com/${PN}/${PN}/archive/v${PV}.tar.gz -> ${P}.tar.gz"
KEYWORDS="~alpha ~amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ~ppc ~ppc64 ~riscv ~s390 ~sparc ~x86"
fi
LICENSE="|| ( Artistic-2 LGPL-3 )"
SLOT="0"
RDEPEND="
dev-lang/perl
sys-libs/zlib
"
DEPEND="
${RDEPEND}
"
BDEPEND="
sys-devel/bison
sys-devel/flex
"
src_prepare() {
default
eautoconf --force
}

42
sci-electronics/verilator/verilator-5.006.ebuild
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@@ -1,42 +0,0 @@
# Copyright 1999-2023 Gentoo Authors
# Distributed under the terms of the GNU General Public License v2
EAPI="8"
inherit autotools
DESCRIPTION="The fast free Verilog/SystemVerilog simulator"
HOMEPAGE="
https://verilator.org
https://github.com/verilator/verilator
"
if [[ "${PV}" == "9999" ]] ; then
inherit git-r3
EGIT_REPO_URI="https://github.com/${PN}/${PN}.git"
else
SRC_URI="https://github.com/${PN}/${PN}/archive/v${PV}.tar.gz -> ${P}.tar.gz"
KEYWORDS="~alpha ~amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ~ppc ~ppc64 ~riscv ~s390 ~sparc ~x86"
fi
LICENSE="|| ( Artistic-2 LGPL-3 )"
SLOT="0"
RDEPEND="
dev-lang/perl
sys-libs/zlib
"
DEPEND="
${RDEPEND}
"
BDEPEND="
sys-devel/bison
sys-devel/flex
"
src_prepare() {
default
eautoconf --force
}