sci-electronics/verilator: add 5.018

Signed-off-by: Huang Rui <vowstar@gmail.com>
This commit is contained in:
Huang Rui
2023-11-03 17:46:40 +08:00
parent db0289f646
commit 3442c4d12e
2 changed files with 43 additions and 0 deletions

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@@ -1,2 +1,3 @@
DIST verilator-4.106.tar.gz 2191982 BLAKE2B 9dbd0dad390b4a009a062a8405dc01a317fed68a2f0becd4bf088c566f2457a4cda04a4c276cf31cdbaa0efa6e64f5618b9439221f8cf4bb469f20f1de1af397 SHA512 b1840b294b22c0d4cf17a0a154e73a631c62b30055f324dca98839ab85e2a524f9e3b6e981b192b941c1dd9837f326ae38cc3fcf686c3f8731d376dc89dd46fe
DIST verilator-5.014.tar.gz 2984988 BLAKE2B 5cf891a0092975bb68c65701f54b71e76579317c537bdf16ce930e7f560ceed0bb33def9d0a78df2e9b3b599f71de7633344d90b45aa54945ec39356ce7a8f87 SHA512 963c15290089fd59870bf15903e71aa29fcc10eb67b3d3f1ae0128e8a29e5dc086c6f3a8d429c24718f54c3cbc3d3bcaa137bd2fa3165a0190c591ed5fc06f37
DIST verilator-5.018.tar.gz 3457115 BLAKE2B ea392ffd4df067180c7662983d6941719afd7cf960347ac12ffb43dd8c0374d4254a9d3056d78cda72534b64f077cae504baefdd357ddb8d07dcdec1fc56f7dd SHA512 671d6d5fa749b00f0e66cdf17f0b8c38523f757e4c33268ee4805e131b38bc6563ffa312827fa547c5f3efb9c539633e412d8e105742ac2f4713e21b43f67ce8

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# Copyright 1999-2023 Gentoo Authors
# Distributed under the terms of the GNU General Public License v2
EAPI="8"
inherit autotools
DESCRIPTION="The fast free Verilog/SystemVerilog simulator"
HOMEPAGE="
https://verilator.org
https://github.com/verilator/verilator
"
if [[ "${PV}" == "9999" ]] ; then
inherit git-r3
EGIT_REPO_URI="https://github.com/${PN}/${PN}.git"
else
SRC_URI="https://github.com/${PN}/${PN}/archive/v${PV}.tar.gz -> ${P}.tar.gz"
KEYWORDS="~alpha ~amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ~ppc ~ppc64 ~riscv ~s390 ~sparc ~x86"
fi
LICENSE="|| ( Artistic-2 LGPL-3 )"
SLOT="0"
RDEPEND="
dev-lang/perl
sys-libs/zlib
"
DEPEND="
${RDEPEND}
"
BDEPEND="
sys-devel/bison
sys-devel/flex
"
src_prepare() {
default
eautoconf --force
}