sci-electronics/verilator: bump to 4.202

Package-Manager: Portage-3.0.18, Repoman-3.0.3
Signed-off-by: Huang Rui <vowstar@gmail.com>

sci-electronics/verilator/Manifest

@@ -1 +1,2 @@
 DIST verilator-4.200.tar.gz 2245877 BLAKE2B e0606966777c9d3c364bc6d6e84a246a27f4ad4ee67871194a4738cf2c3f76529fe23d2a555139bc9b8eba268ed1929b651a161a7434dd380ec9762cb907f43e SHA512 f2fac4c46006c064b4a31b0edf0c3b1aebdea7e158ca6f8445ae3ece97f1132cd95dbfd63dc5e0f0cb4566a839f44ae0547e0e604cdd3231cf79a7400353fbb5
+DIST verilator-4.202.tar.gz 2352846 BLAKE2B 9bd1744c3a8b4b750fbf57731078a09d41eb4708a7a3806d2110ab197fb60f23cf0956cb625058d6c6b6e03058ad15cf112f38f920ce93a8cc82a17b90363421 SHA512 2241d06f06cee708269e09d50725973bb1fc1c20f8873114ad6525c2b4bea940a0ed42369b2a2e19ba72dbc40b9271c35124b1d9db9f6421c2856075b0636780

sci-electronics/verilator/verilator-4.202.ebuild

@@ -0,0 +1,42 @@
+# Copyright 1999-2021 Gentoo Authors
+# Distributed under the terms of the GNU General Public License v2
+
+EAPI="7"
+
+inherit autotools
+
+DESCRIPTION="The fast free Verilog/SystemVerilog simulator"
+HOMEPAGE="
+	https://verilator.org
+	https://github.com/verilator/verilator
+"
+
+if [[ "${PV}" == "9999" ]] ; then
+	inherit git-r3
+	EGIT_REPO_URI="https://github.com/${PN}/${PN}.git"
+else
+	SRC_URI="https://github.com/${PN}/${PN}/archive/v${PV}.tar.gz -> ${P}.tar.gz"
+	KEYWORDS="~alpha ~amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ~ppc ~ppc64 ~riscv ~s390 ~sparc ~x86"
+fi
+
+LICENSE="|| ( Artistic-2 LGPL-3 )"
+SLOT="0"
+
+RDEPEND="
+	dev-lang/perl
+	sys-libs/zlib
+"
+
+DEPEND="
+	${RDEPEND}
+"
+
+BDEPEND="
+	sys-devel/bison
+	sys-devel/flex
+"
+
+src_prepare() {
+	default
+	eautoconf --force
+}