sci-electronics/verilator: bump to 4.108

Package-Manager: Portage-3.0.14, Repoman-3.0.2
Signed-off-by: Huang Rui <vowstar@gmail.com>
This commit is contained in:
Huang Rui
2021-01-21 14:38:58 +08:00
parent 3a66e44805
commit 13605823ec
2 changed files with 43 additions and 0 deletions

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DIST verilator-4.106.tar.gz 2191982 BLAKE2B 9dbd0dad390b4a009a062a8405dc01a317fed68a2f0becd4bf088c566f2457a4cda04a4c276cf31cdbaa0efa6e64f5618b9439221f8cf4bb469f20f1de1af397 SHA512 b1840b294b22c0d4cf17a0a154e73a631c62b30055f324dca98839ab85e2a524f9e3b6e981b192b941c1dd9837f326ae38cc3fcf686c3f8731d376dc89dd46fe
DIST verilator-4.108.tar.gz 2217541 BLAKE2B 52321477102f3762f3881b7b8ca38b7ffc6a19903f9f8091909d0bbe003fcb86c2bc0075249044b6483705d97fd2e85998e0d6b7b7c64c362a5224a4dc2ccbaf SHA512 a2e2f279f08c0781e3fa158923376574244052dc87a2d72ecd48d63efac3743e264a79f2121175a1766c7fb2fb56104e919baee75879a1e5c4c4a96dd22bfd91

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# Copyright 1999-2021 Gentoo Authors
# Distributed under the terms of the GNU General Public License v2
EAPI="7"
inherit autotools
DESCRIPTION="The fast free Verilog/SystemVerilog simulator"
HOMEPAGE="
https://verilator.org
https://github.com/verilator/verilator
"
if [[ "${PV}" == "9999" ]] ; then
inherit git-r3
EGIT_REPO_URI="https://github.com/${PN}/${PN}.git"
else
SRC_URI="https://github.com/${PN}/${PN}/archive/v${PV}.tar.gz -> ${P}.tar.gz"
KEYWORDS="~alpha ~amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ~ppc ~ppc64 ~riscv ~s390 ~sparc ~x86"
fi
LICENSE="|| ( Artistic-2 LGPL-3 )"
SLOT="0"
RDEPEND="
dev-lang/perl
sys-libs/zlib
"
DEPEND="
${RDEPEND}
"
BDEPEND="
sys-devel/bison
sys-devel/flex
"
src_prepare() {
default
eautoconf --force
}